TSMC Fabrication Processes The TSMC fabrication processes available range from 40 nanometer to 0.35 µm. Low power, low voltage, and high voltage options are available in most of these technologies.
TSMC Processes Available Through MOSIS MOSIS has compiled the following chart comparing various features to help you better select which TSMC process is most appropriate to your applicaiton.
Feature Size |
Process |
Description |
|
40 nm |
|
Low-power logic |
|
65 nm |
|
Standard logic, RPO |
|
Mixed-mode/RF, RPO, MiM |
|
90 nm |
|
Standard logic, RPO |
|
Mixed-mode/RF, RPO, MiM |
|
0.13 µm |
CL013G |
Standard logic, RPO |
CR013G (CM013) |
Mixed-mode, RPO, MiM |
CL013LP |
Low-power logic, RPO |
CL013LV |
Low-voltage logic, RPO |
|
0.18 µm |
CL018 |
Standard logic, RPO |
CR018 (CM018) |
Mixed-mode/RF, RPO, MiM |
CL018LP |
Low-power logic, RPO |
CL018LV |
Low-voltage logic, RPO |
CL018HV |
High-voltage, RPO |
|
0.25 µm |
CL025 |
Standard logic, RPO |
CR025 (CM025) |
Mixed-mode/RF, RPO, MiM |
|
0.35 µm |
CL035 |
Standard logic, 5.0 V ESD, RPO |
CM035 |
Mixed-mode/RF, 5.0 V ESD, PiP, 2-poly |
CL035HV1 |
High-voltage, RPO |
1 The TSMC 0.35 µm HV DDD process uses Ar anneal wafers (argon annealed wafers); the BCD process uses Hi-Wafer (hydrogen annealed wafer).
| | These processes use non-epitaxial wafers. Epitaxial wafers are available at an additional cost. Specify "epitaxial wafers" in the "Options" section of the Request for Custom Quote form for pricing. To order epitaxial wafers, submit the Request for Custom Quote and select the epitaxial fabrication option from either the New Project, Fabricate, or Update form.
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